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pcmcia flash memory card flg series 1 white electronic designs june, 2003 rev. 4 white electronic designs corp. reserves the right to change products or speci?cations without notice. white electronic designs corporation ? (602) 437-1520 ? www.wedc.com pcmcia flash memory card - 256 kilobyte through 5 megabyte (intel/catalyst based) general description wedcs flg series flash memory cards offer low/medium density linear flash solid state storage solutions for code and data storage, high performance disk emulation and execute in place (xip) applications in mobile pc and dedicated (embedded) equipment. flg series cards conform to pcmcia international standard. the cards control logic provides the system interface and controls the internal flash memories. card can be read/written in byte-wide or word-wide mode which allows for ?exible integration into various systems. combined with ?le management software, such as flash translation layer (ftl), flg flash cards provide removable high- performance disk emulation. the flg series cards contain separate 2kb eeprom memory for card information structure (cis) which can be used for easy identi?cation of card characteristics. the wedc flg series is based on intel/catalyst 28f010 or 28f020 flash memories. note: standard options include attribute memory. cards without attribute memory are available. cards are also available with or without a hardware write protect switch. features ? low cost low/medium density linear flash card ? supports 5v systems with 12v v pp . ? based on intel cmos components ? fast read performance - 150ns maximum access time ? x8/ x16 data interface ? quick-pulse programming algorithm - typical 10s byte-program ? 100,000 erase/program cycles ? pc card standard type i form factor architecture overview wedcs flg series is designed to support from 2 to 20, 1mb or 2mb components, providing a wide range of density options. cards are based on the 28f010 (1mb) or 28f020 components which work with 5v v cc /12v v pp applications. device codes are b4 h and bd h respectively (manufacture id 89 for intel and 31 for catalyst). systems should be able to recognize all the codes. cards utilizing the1mb components provide densities ranging from 256kb to 2.5mb in 256kb increments, cards utilizing 2mb components provide densities ranging from 512kb to 5mb in 512kb increments. in support of the pc card 95 standard for word wide access devices are paired. write, read and erase operations can be performed as either a word or byte wide operation . by multiplexing a0, ce1 and ce2, 8-bit hosts can access all data on data lines dq0 - dq7. the flg series cards conform to the pc card standard (pcmcia) and jeida, providing electrical and physical compatibility. the pc card form factor offers an industry standard pinout and mechanical outline, allowing density upgrades without system design changes. wedcs standard cards are shipped with wedcs logo. cards are also available with blank housings (no logo). the blank housings are available in both a recessed (for label) and flat housing. please contact wedc sales representative for further information on custom artwork.
pcmcia flash memory card flg series 2 white electronic designs june, 2003 rev. 4 white electronic designs corp. reserves the right to change products or speci?cations without notice. white electronic designs corporation ? (602) 437-1520 ? www.wedc.com block diagram device type manuf id intel/catalyst device id 28f010 89h / 31h b4 h 28f020 89h / 31h bd h supported components (max 20 x): 28f010-max 2.5mb 28f020-max 5mb da ta bus d8-d15 vc c de vi ce 18 de vi ce 1 csl9 de vi ce 2 csl1 csl0 de vi ce pair 0 de vi ce pair 1 de vi ce 3 de vi ce pa ir 9 da ta bus q0-q7 i/o bu ff er control vc c da ta bus d0-d 7 de vi ce 19 da ta bus q8-q15 de vi ce 0 q0 -q 7 wr # csl9 rd# c9 at t e nabl e csl0 c0 co nt ro l log ic pcmci a in te rf ace ctrl attr ib . me m ci s eepro m 2k b we # oe # ce2# ce1# reg# a0 wp add re ss bus contro l ad dres s bu s add res s bu ffe r array addres s bu s a1-a21(22 ) a1 -a 17(18 ) lo w hi gh csh9 c9 csh0 c0 csh9 csh1 csh0 vc c vc c vp p2 vp p1 cd1# gn d cd2 # wa it # vc c bvd1 bvd 2 vc c vs1 open vs2 open
pcmcia flash memory card flg series 3 white electronic designs june, 2003 rev. 4 white electronic designs corp. reserves the right to change products or speci?cations without notice. white electronic designs corporation ? (602) 437-1520 ? www.wedc.com pin signal name i/o function active 1 gnd ground 2 dq 3 i/o data bit 3 3 dq 4 i/o data bit 4 4 dq 5 i/o data bit 5 5 dq 6 i/o data bit 6 6 dq 7 i/o data bit 7 7 ce 1 # i card enable 1 low 8 a 10 i address bit 10 9 oe# i output enable low 10 a 11 i address bit 11 11 a 9 i address bit 9 12 a 8 i address bit 8 13 a 13 i address bit 13 14 a 14 i address bit 14 15 we# i write enable low 16 rdy/bsy# o ready/busy n.c. 17 v cc supply voltage 18 v pp 1 prog. voltage 19 a 16 i address bit 16 20 a 15 i address bit 15 21 a 12 i address bit 12 22 a 7 i address bit 7 23 a 6 i address bit 6 24 a 5 i address bit 5 25 a 4 i address bit 4 26 a 3 i address bit 3 27 a 2 i address bit 2 28 a 1 i address bit 1 29 a 0 i address bit 0 30 dq 0 i/o data bit 0 31 dq 1 i/o data bit 1 32 dq 2 i/o data bit 2 33 wp o write potect high 34 gnd ground pin signal name i/o function active 35 gnd ground 36 cd 1 # o card detect 1 low 37 dq 11 i/o data bit 11 38 dq 12 i/o data bit 12 39 dq 13 i/o data bit 13 40 dq 14 i/o data bit 14 41 dq 15 i data bit 15 42 ce 2 # i card enable 2 low 43 vs 1 o voltage sense 1 n.c. 44 rfu reserved 45 rfu reserved 46 a 17 i address bit 17 256kb(2) 47 a 18 i address bit 18 512kb(2) 48 a 19 i address bit 19 1mb(2) 49 a 20 i address bit 20 2mb(2) 50 a 21 i address bit 21 4mb(2,3) 51 v cc supply voltage 52 v pp 2 prog. voltage 53 a 22 i address bit 22 8mb(2,3) 54 a 23 i address bit 23 n.c. 55 a 24 i address bit 24 n.c. 56 a 25 i address bit 25 n.c. 57 vs 2 o voltage sense 2 n.c. 58 rst i card reset n.c. 59 wait# o extended bus cycle low(1) 60 rfu reserved 61 reg# i attrib mem select 62 bvd 2 o bat. volt. detect 2 (1) 63 bvd 1 o bat. volt. detect 1 (1) 64 dq 8 i/o data bit 8 65 dq 9 i/o data bit 9 66 dq 10 o data bit 10 67 cd 2 # o card detect 2 low 68 gnd ground pinout notes: 1. wait#, bvd1 and bvd2 are driven high for compatibility 2. shows density for which speci?ed address bit is msb. higher order address bits are no connects (i.e. 4mb a21 is msb a22 - a25 are nc). 3. for the 3mb card the memory will wrap at the 4mb boundary, for the 5mb card the memory will wrap at the 8mb boundary. 54. 0m m 0.10 (2.126) 10.0 mm mi n (0.400 ) 1.6m m 0.05 (0.063 ) 1.0m m 0.05 (0.039) 1.0m m 0.05 (0.039) 3.3m m t1 (0.130) t1 =0.10m m in terconnect area t1 =0.20m m substrate area interconnect ar ea 10.0 mm mi n (0.400) 3.0m m mi n 85.6 mm 0.20 (3.370) su bstrate are a
pcmcia flash memory card flg series 4 white electronic designs june, 2003 rev. 4 white electronic designs corp. reserves the right to change products or speci?cations without notice. white electronic designs corporation ? (602) 437-1520 ? www.wedc.com card signal description symbol type name and function a 0 - a 25 input address inputs: a 0 through a 25 enable direct addressing of up to 64mb of memory on the card. signal a 0 is not used in word access mode. the memory will wrap at the card density boundary (see pinout, note 3). the system should not try to access memory beyond the card density. a 25 is the most signi?cant bit. a 23 - a 25 are not connected. dq 0 - dq 15 input/output data input/output: dq 0 through dq 15 constitute the bi-directional databus. dq 0 - dq 7 constitute the lower (even) byte and dq 8 - dq 15 the upper (odd) byte. dq 15 is the msb. ce 1# , ce 2# input card enable 1 and 2: ce 1 enables even byte accesses, ce 2 enables odd byte accesses. multiplexing a 0 , ce 1 and ce 2 allows 8-bit hosts to access all data on dq 0 - dq 7 . oe# input output enable: active low signal gating read data from the memory card. we# input write enable: active low signal gating write data to the memory card. rdy/bsy# n.c. ready/busy output: indicates status of internally timed erase or program algorithms. this signal is not connected. cd 1# , cd 2# output card detect 1 and 2: provide card insertion detection. these signals are connected to ground internally on the memory card. the host shall monitor these signals to detect card insertion (pulled-up on host side). wp output write protect: write protect re?ects the status of the write protect switch on the memory card. wp set to high = write protected, providing internal hardware write lockout to the flash array.if card does not include optional write protect switch, this signal will be pulled low internally indicating write protect = off. v pp 1 program/erase power supply: provides programming voltages 12.0v for lower byte (d 0 - d 7 ) memory components. v pp 2 program/erase power supply: provides programming voltages 12.0v for lower byte (d 8 - d 15 ) memory components. v cc card power supply: 5.0v gnd card ground reg# input attribute memory select : active low signal, enables access to attribute memory plane, occupied by card information structure and card registers. rst# n.c. reset: active high signal for placing card in power-on default state. this signal is not connected. wait# output wait: this signal is pulled high internally for compatibility. no wait states are generated. bvd 1 , bvd 2 output battery voltage detect: these signals are pulled high to maintain sram card compatibility. vs 1 , vs 2 output voltage sense: noti?es the host socket of the cards v cc requirements. vs 1 and vs 2 are open to indicate a 5v card has been inserted. rfu reserved for future use n.c. no internal connection to card: pin may be driven or left ?oating * require proper programming voltages (v pp 1, v pp 2). program or erase with an invalid v pp should not be attempted. functional truth table read function function mode ce 2# ce 1# a 0 oe# we# standby mode h h x x x byte access (8 bits) h l l l h h l h l h word access (16 bits) l l x l h odd-byte only access l h x l h common memory reg# d 15 -d 8 d 7 -d 0 x high-z high-z h high-z even-byte h high-z odd-byte h odd-byte even-byte h odd-byte high-z attribute memory reg# d 15 -d 8 d 7 -d 0 x high-z high-z l high-z even-byte l high-z not valid l not valid even-byte l not valid high-z write function* standby mode h h x x x byte access (8 bits) h l l h l h l h h l word access (16 bits) l l x h l odd-byte only access l h x h l x x x h x even-byte h x odd-byte h odd-byte even-byte h odd-byte x x x x l x even-byte l x x l x even-byte l x x
pcmcia flash memory card flg series 5 white electronic designs june, 2003 rev. 4 white electronic designs corp. reserves the right to change products or speci?cations without notice. white electronic designs corporation ? (602) 437-1520 ? www.wedc.com absolute maximum ratings (2) operating temperature ta (ambient) commercial 0c to +60 c industrial -40c to +85 c storage temperature commercial -30c to +80 c industrial -40c to +85 c voltage on any pin relative to v ss -0.5v to v cc +0.5v v cc supply voltage relative to v ss -0.5v to +7.0v note: stress greater than those listed under absolute maximum ratings may cause permanent damage to the device. this is a stress rating only and functional operation at these or any other conditions greater than those indicated in the operational sections of this speci?cation is not implied. exposure to absolute maximum rating conditions for extended periods may affect reliability. dc characteristics (1) sym parameter density notes typ (4) max units test conditions i ccr v cc read current all 10 30 ma v cc = v cc max tcycle = 150ns, cmos levels i ccw v cc program current all v pp = 12v 1.0 10 ma programming in progress i ppw v cc program current all v pp = 12v 8.0 30 ma v pp =v pp h programming in progress i cce v cc erase current all v pp = 12v 5.0 15 ma erasure in progress i ppe v pp erase current all v pp = 12v 10 30 ma v pp =v pp h erasure in progress i ccs (cmos) v cc standby current 256kb a v cc = v cc max control signals = v cc cmos levels 512kb 100 1mb 2mb 3mb 4mb 5mb notes: 1. all currents are rms values unless otherwise speci?ed. i ccr , i ccw and i cce are based on byte wide operations. for 16 bit operation values are double 2. control signals: ce 1# , ce 2# , oe#, we#, reg#. 3. typical: v cc = 5v, t = +25c. cmos test conditions: v cc = 5v 5%, v il = v ss 0.2v, v ih = v cc 0.2v symbol parameter notes min max units test conditions i li input leakage current 1 10 a v cc = v cc max v in =v cc or v ss i lo output leakage current 1 10 a v cc = v cc max v out =v cc or v ss v iil input low voltage 1 0 0.8 v v ih input high voltage 1 0.7v cc v cc+ 0.5 v v ol output low voltage 1 0.4 v i ol = 3.2ma v oh output high voltage 1 v cc -0.4 v cc v i oh = -2.0ma v lko v cc erase/program lock voltage 1 2.5 v notes: 1. values are the same for byte and word wide modes for all card densities. 2. exceptions: leakage currents on ce 1# , ce 2# , oe#, reg# and we# will be < 500 a when v in = gnd due to internal pull-up resistors.
pcmcia flash memory card flg series 6 white electronic designs june, 2003 rev. 4 white electronic designs corp. reserves the right to change products or speci?cations without notice. white electronic designs corporation ? (602) 437-1520 ? www.wedc.com ac characteristics sym (pcmcia) parameter 150ns 200ns unit min max min max t c (r) read cycle time 150 ns t a (a) address access time 150 200 200 ns t a (ce) card enable access time 150 200 ns t a (oe) output enable access time 75 100 ns t su (a) address setup time 20 20 ns t su (ce) card enable setup time 0 0 ns t h (a) address hold time 20 20 ns t h (ce) card enable hold time 20 20 ns t v (a) output hold from address change 0 0 ns t dis (ce) output disable time from ce# 60 60 ns t dis (oe) output disable time from oe# 60 5 60 ns t en (ce) output enable time from ce# 5 ns t en (oe) output enable time from oe# 5 5 ns note: ac timing diagrams and characteristics are guaranteed to meet or exceed pcmcia 2.1 speci?cations. read timing parameters read timing diagram note: signal may be high or low in this area. a [25::0], reg# t c (r) ce 1# , ce 2# oe# d[15::0] t a (ce) t h (a) t su (a) note 1 d ata v alid t a (a) t v (a) t su (ce) note 1 t a (oe) t h (ce) t en (oe) t dis (ce) t dis (oe)
pcmcia flash memory card flg series 7 white electronic designs june, 2003 rev. 4 white electronic designs corp. reserves the right to change products or speci?cations without notice. white electronic designs corporation ? (602) 437-1520 ? www.wedc.com sym (pcmcia) parameter 150ns 200ns unit min max min max t c w write cycle time 150 200 ns t w (we) write pulse width 80 120 ns t su (a) address setup time 20 20 ns t su (a-weh) address setup time for we# 100 100 ns t su (ce-weh) card enable setup time for we# 100 100 ns t su (d-weh) data setup time for we# 50 50 ns t h (d) data hold time 20 20 ns t rec (we) write recover time 20 20 ns t dis (we) output disable time from we# 60 60 ns t dis (oe) output disable time from oe# 60 60 ns t en (we) output enable time from we# 5 5 ns t en (oe) output enable time from oe# 5 5 ns t su (oe-we) output enable setup from we# 10 10 ns t h (oe-we) output enable hold from we# 10 10 ns t su (ce) card enable setup time from oe# 0 0 ns t h (ce) card enable hold time 20 20 ns note: ac timing diagrams and characteristics are guaranteed to meet or exceed pcmcia 2.1 speci?cations. write timing parameters write timing diagram notes: 1. signal may be high or low in this area. 2. when the data i/o pins are in the output state, no signals shall be applied to the data pins (d15 - d0) by the host system. a [25::0], reg# t c (w) ce 1# , ce 2# oe# d[15::0](d in ) t w (we) t su (a) note 1 d ata input t su (a-weh) t su (ce) note 1 t rec (we) t h (ce) t su (oe-we) t h (d) t en (we) d[15::0](d out ) we# t su (ce-weh) t h (oe-we) t di s (oe) t di s (we) note 2 note 2 t su (d-weh) t en (oe)
pcmcia flash memory card flg series 8 white electronic designs june, 2003 rev. 4 white electronic designs corp. reserves the right to change products or speci?cations without notice. white electronic designs corporation ? (602) 437-1520 ? www.wedc.com data write and erase performance (1,3) v cc = 5v 5%, t a = 0c to + 60c parameter notes min typ (1) max units chip program time 28f010 1,2,4 2 12.5 sec 28f020 1,2,4 4 25 chip erase time 28f010 1,3,4 1 10 sec 28f020 1,3,4 2 30 notes: 1. typical: nominal voltages and t a = 25oc. 2. minimum byte programming time excluding system overhead is 16 s (10s program + 6s write recovery), while maximum is 400s/byte (16 s x 25 loops allowed by algorithm). max chip programming time is speci?ed lower than the worst case allowed by the programming algorithm since most bytes program signi?cantly faster than the worst case byte. 3. excludes 00h programming prior to erasure. 4. excludes system-level overhead. address value description 00h 01h cistpl_device 02h 03h tpl_link 04h 53h 52h flash = 150ns (device writable) flash = 200ns (device writable) 06h 0ch 05h 0dh 06h 2dh 0eh 4dh card size: 256kb 512kb 1mb 2mb 3mb 4mb 5mb 08h ffh end of device 0ah 18h cistpl_jedec_c 0ch 02h tpl_link 0eh 89h intel - id 10h b4h bdh intel 28f010 - id intel 28f020 - id 12h 17h cistpl_device_a 14h 03h tpl_link 16h 42h eeprom - 200ns 18h 01h device size = 2kbytes 1ah ffh end of tuple 1ch 1eh cistpl_devicegeo 1eh 06h tpl_link 20h 02h dgtpl_bus 22h 11h dgtpl_ebs 24h 01h dgtpl_rbs 26h 01h dgtpl_wbs 28h 01h dgtpl_part 2ah 01h flash device non-interleaved 2ch 20h cistpl_manfid 2eh 04h tpl_link(04h) 30h f6h edi tplmid_manf: lsb 32h 01h edi tplmid_manf: msb cis information for fld series cards address value description 34h 00h lsb: number not assigned 36h 00h msb: number not assigned 38h 15h cistpl_vers1 3ah 47h tpl_link 3ch 04h tpllv1_major 3eh 01h tpllv1_minor 40h 45h e 42h 44h d 44h 49h i 46h 37h 7 48h 50h p 4ah 32h 35h 36h 2 5 6 4ch 4eh 35h 31h 32h 5 1 2 30h 30h 31h 0 0 1 30h 30h 32h 0 0 2 30h 30h 33h 0 0 3 30h 30h 34h 0 0 4 30h 30h 35h 0 0 5 50h 46h f 52h 4ch l 54h 47h g
pcmcia flash memory card flg series 9 white electronic designs june, 2003 rev. 4 white electronic designs corp. reserves the right to change products or speci?cations without notice. white electronic designs corporation ? (602) 437-1520 ? www.wedc.com address value description 56h 30h 0 58h 32h 2 30h 0 36h 6 5ah 2dh - 5ch 2dh - 5eh 2dh - 60h 31h 1 62h 35h 5 64h 20h space 66h 00h end text 68h 43h c 6ah 4fh o 6ch 50h p 6eh 59h y 70h 52h r 72h 49h i 74h 47h g 76h 48h h 78h 54h t 7ah 20h space 7ch 45h e 7eh 4ch l 80h 45h e 82h 43h c 84h 54h t 86h 52h r 88h 4fh o 8ah 4eh n 8ch 49h i 8eh 43h c cis information for fld series cards (cont.) address value description 90h 20h space 92h 44h d 94h 45h e 96h 53e s 98h 49h i 9ah 47h g 9ch 4eh n 9eh 53h s a0h 20h space a2h 49h i a4h 4eh n a6h 43h c a8h 4fh o aah 52h r ach 50h p aeh 4fh o b0h 52h r b2h 41h a b4h 54h t b6h 45h e b8h 44h d bah 20h space bch 00h end text beh 31h 1 c0h 39h 9 c2h 39h 9 c4h 37h 7 c6h 00h end text c8h ffh end of list cah ffh cistpl_end dch 00h invalid address
pcmcia flash memory card flg series 10 white electronic designs june, 2003 rev. 4 white electronic designs corp. reserves the right to change products or speci?cations without notice. white electronic designs corporation ? (602) 437-1520 ? www.wedc.com product marking edi wed 7p001flg0200c15 c995 9915 company name part number lot code/trace number date code 7 p 001 flg02 00 c 15 card technology 7 flash 8 sram pc card p s tandard pcmcia r ruggedized pcmcia card capacity 001 1mb card family and version - see card family and version info. for details (next page) packaging option 00 standard, type 1 temperature range c = commercial 0c to +70c i = industrial -40c to +85c card access time 15 150ns 20 200ns part numbering the shaded area (addresses 56h 58h) represents just some of the family versions. for all the versions see the card family and version information.
pcmcia flash memory card flg series 11 white electronic designs june, 2003 rev. 4 white electronic designs corp. reserves the right to change products or speci?cations without notice. white electronic designs corporation ? (602) 437-1520 ? www.wedc.com xxx 256 1) 256kb 512 512kb 001 1mb 002 2mb 003 2) 3mb 004 2) 4mb 005 2) 5mb 1) availalbe only with 28f010 2) availalbe only with 28f020 flgyy card version (see card family and version information) ss 00 wedc silkscreen 01 blank housing, type i 02 blank housing, type i recessed t c = commercial i** = industrial zz 15 150ns 20 200ns notes: options with intermediate memory capacities, without attribute memory and with hardware write protect switch are available. ** denotes advanced information. ordering information 7p xxx flgyy ss t zz flg 01-flg04 intel* based on 28f010 flg 11-flg14 catalyst flg11 no attribute memory, no write protect flg12 with attribute memory, no write protect flg13 no attribute memory, with write protect flg14 with attribute memory, with write protect example p/n 7p xxx flg 12 ss t zz flg 05-flg08 intel* based on 28f020 flg 15-flg18 catalyst flg15 no attribute memory, no write protect flg16 with attribute memory, no write protect flg17 no attribute memory, with write protect flg18 with attribute memory, with write protect example p/n 7p xxx flg 06 ss t zz *discontinued C memory components not available card family and version information

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